High performance and low variability fully-depleted strained-SOI MOSFETs

In this paper, we demonstrate high performance Fully Depleted Silicon-On-Insulator CMOS on 300mm strained SOI (sSOI) wafers. Up to 100% drive current (I
_ON
) enhancement is demonstrated by sSOI nMOSFETs vs. unstrained SOI at W=80nm active width and L=45nm gate length. These devices indeed yield 1200μA/μm I
_ON
at I
_OFF
=10
^-8
A/μm and V
_D
=0.9V supply voltage. At the same time, they highlight the same excellent V
_T
variability as the transistors on unstrained SOI. Optimizations of extensions and source/drain implants have been realized on both n&pMOS in order to boost further this trade-off between performance and variability thanks to electrostatic improvements.