Distributed binary decision diagrams for verification of large circuits

Binary Decision Diagrams (BDDs) are widely used for efficiently representing logic designs and for verifying their equivalence. However, they often require large amounts of memory even for relatively small circuits. This paper presents a new mechanism for alleviating the memory consumption problem by exploiting the memory available in a cluster of workstations. The memory required for a BDD node may be allocated in other machines on the network, and any reference to a BDD node returns the value from the appropriate machine in a transparent fashion. Using this technique we are able to verify the sequential benchmark s1423, even though the BDDs required for verification exceed 2 gigabytes of storage.