Homogeneous MPSoC as baseband signal processing engine for OFDM systems

This paper presents a homogeneous Multi-Processor System-on-Chip (MPSoC) as baseband signal processing engine for software defined radio applications. The implementation and parallelisation of a generic OFDM system is presented taking as study case the physical layer of the IEEE 802.11a standard. The MPSoC is composed of nine computational nodes connected in a mesh topology through a hierarchical network-on-chip. Each node hosts a COFFEE RISC processor as processing element. The architecture was prototyped on an ALTERA STRATIX IV FPGA working at a maximum frequency of 180 MHz.