Opportunities for PMOS read and write ports in low voltage dual-port 8T bit cell arrays

Strained silicon has enhanced PMOS transistor current much more than NMOS. As such, I
_DSATN
/I
_DSATP
≈ 1 is nearing reality. This work studies the effect of this presumably continuing trend on dual-port 8T bit cell performance. Preference for using NMOS or PMOS in write and read ports is shown to depend on current ratio, V
_MIN
circuit assist and array access type.