Chip-package co-design for mixed SoC

A chip-package co-design method is presented for high frequency mixed SoC. Based on the analysis of simulation result of package and chip, a RC circuit which is composed of resistor and capacitor is designed on chip to suppress the affect of Simultaneous Switch Noise(SSN). Consequently, chip-package co-simulation achieves a good agreement with measurement as the co-design method is used to predict the performance of mixed SoC.