A 3–14 GHz pseudo-differential distributed low noise amplifier

A 3–14 GHz pseudo-differential distributed low noise amplifier, henceforth referred to as the distributed amplifier (DA), is reported. The DA is realized in the WIN PL15–10 process, which is a 0.15 µm Al
0.3
Ga
0.7
As/In
0.5
Ga
0.5
As low-noise depletion-mode pseudomorphic high electron mobility transistor (pHEMT) process. The DA features 10 pseudo-differential cascode pair unit cells. The chip also features V
GS
and V
G2
gate bias circuits for threshold voltage, V
T
, offset compensation. Measured values for the figures of merit are: a 3–14 GHz bandwidth, 17 ± 1 dB of small-signal gain, a < 2.3 dB noise figure, a > 10 dB input and output return loss, and a one dB compression point of better than 15 dBm at 10 GHz. The DA draws 200 mA from a 3 V supply, and its dimensions are: 3.1 × 2.4 mm
²
.