A CMOS DC offset cancellation (DOC) circuit for PGA of low IF wireless receivers

In this paper, the sources of DC offset and the corresponding DC offset cancellation techniques are analyzed. A DC negative feedback technique based DC offset canceller (DOC) is designed in details and implemented by SMIC 0.18μm CMOS process. DC offset detector is an important part of DOC. In this paper, an on chip DC offset detection circuit is proposed for the DC negative feedback canceller which can be used in the CMOS programmable gain amplifier (PGA) of a low intermediate frequency (IF) receiver such as IEEE802.15.4/ZigBee wireless sensor network. Post-simulation and chip measurement results show that the DC offset canceller performs well.