Crosstalk aware bandwidth modeling for distributed on-chip RLCG interconnects using difference model approach

In case of very high frequency as in Giga-scale (GHz), no longer can interconnects be treated as mere delays or lumped RC networks. The most common simulation model for interconnects is the distributed RC and RLC model. The impact of interconnects on circuit performance in both the analog and digital domains is ever increasing. Unfortunately, this model has many limitations which can lead to inaccurate simulations if not modeled correctly. Crosstalk, ringing and reflection are just some of the issues that need to be addressed and then circumvented or utilized. The traditional analysis of crosstalk in a transmission line begins with a lossless LC representation, yielding a wave equation governing the system response. With the reduction of distances between wires in deep sub-micron technologies, coupling capacitances are becoming significant. This increase in capacitance gives rise to noise which is capable of propagating a logical fault. A bad evaluation of the crosstalk could be at the origin of a malfunction of the circuit. Cross talk can be analyzed by computing the signal linkage between aggressor or attacker nets and victim nets. The attacker net carries a signal that couples to the victim net through the parasitic capacitance. To determine the effects that this cross talk will have on circuit operation, the resulting delays and logic levels for the victim nets must be computed. This paper proposes a difference model approach to derive a crosstalk aware bandwidth estimation method in the transform domain. A closed form solution for bandwidth is obtained by incorporating initial conditions using difference model approach for distributed RLCG interconnects. The simulation results justify the accuracy of our approach.