Design of a parallel photonic FFT processor

We present the design of a parallel high-performance chipset for computing 1-D complex fast Fourier transforms (FFTs). The chipset is composed of two chips-a photonic FFT processing engine (PFFT) and a photonic data storage element (PRAM). Using this chipset, a number of high-speed systems can be created. The chipset is compatible with a number of available interconnect technologies, such as free-space optical interconnection schemes involving the flip-chip integration of submicron CMOS ICs with GaAs chips containing 2-D arrays of multiple quantum well diode optical receivers and transmitters.