Hardware implementation and experiment validation of the VDDRHF color image filter

This paper proposes a novel FPGA implementation of (Vector Directional Distance Rational Hybrid Filter) (VDDRHF) for mixed noise suppression and fine-details preservation in color images. The Implementation was done, based on FPGA HW/SW validation using efficient hardware optimizations and non linear function approximations. The validation using FPGA board confirms the color image quality preservation. Our proposed architecture proves that HW/SW co-design present a high timing performance compared to software based solutions.