Suppression of anomalous threshold voltage increase with area scaling for Mg- or La-incorporated high-k/Metal gate nMISFETs in deeply scaled region

Anomalous threshold voltage increase with area scaling of Mg- or La-incorporated high-k gate dielectrics has great impact on scaled devices. This paper reveals that much amount of Mg or La capping effects for V
_t
reduction was disappeared with the increase of electron mobility in narrow channel nMISFETs. This phenomenon is explained with absorption of Mg and La into STI from bulk high-k layer. The key to suppress the area scaling dependence is pilling Mg or La atoms up near high-k/IFL interface which enable us increase of stable capping effect. Combination of processing for high-k gate dielectrics and device structure with the high-k dielectrics under offset spacers was found to effectively suppress the V
_t
increase at the 100 nm channel width. As a conclusion, the large capping effect for V
_t
reduction over 400 mV is achieved in scaled devices using this technique.