Low leakage and low variability Ultra-Thin Body and Buried Oxide (UT2B) SOI technology for 20nm low power CMOS and beyond

We fabricated CMOS devices on Ultra-Thin Boby and Buried Oxide SOI wafers using a single mid-gap gate stack. Excellent global, local and intrinsic V
_T
-variability performances are obtained (A
_VT
=1.45mV.μm). This leads to 6T-SRAM cells with good characteristics down to V
_DD
=0.5V supply voltage and with excellent Static Noise Margin (SNM) dispersion across the wafer (σ
_SNM
<;SNM/6) down to V
_DD
=0.7V. We also demonstrate ultra-low leakage (<;0.5pA/μm) on UT2B devices at L
_G
=30nm by source/back biasing thanks to a low gate current and Gate Induced Drain Lowering (GIDL).