Gate-controlled lateral PNP BJT: characteristics, modeling and circuit applications

This paper describes the electrical characteristics, modeling and some circuit applications of a gate-controlled lateral pnp transistor (GC-LPNP) which has four electrodes-collector (C), base (B), emitter (E) and gate (G), and was fabricated using a 0.8 /spl mu/m BiCMOS technology. This device is composed of a surface PMOS FET and a bulk lateral pnp BJT in parallel, and it has unique dc characteristics of either variable current gain /spl beta//sub F/ of 10/sup 2//spl sim/10/sup 4/ for V/sub G/ variations from 0.4 to -0.4 V at V/sub E/ biases of 0.4 to 0.6 V, or variable transconductance g/sub M/ that increases by 3/spl sim/10 times as V/sub E/ increases from 0.4 to 0.7 V at V/sub G/ biases of -0.2 to -0.4 V. A circuit model of this new device, which is suitable for SPICE circuit simulation is proposed, and this model gives good agreement to the measured current-voltage curves over a wide range of V/sub C/-, V/sub E/- and V/sub G/-variations. Using this new four-electrode hybrid device, some special functional analog circuits, such as a variable-gain amplifier (VGA) and a mixer circuit, can be built very easily and exhibit good performance, For the VGA circuit, variations of the ac gain control of 0.4/spl sim/5.5 times for /spl delta/V/sub G/ varies over 1 V was obtained; and for the mixer, a conversion gain of 5 dB to 12 dB for input RF signal up to 400 MHz was obtained. PSPICE simulation results for the VGA circuit using the GC-LPNP device model are in good agreement with measurements. Finally, this new device which was fabricated using a typical BiCMOS technology, can be directly integrated with other digital/analog VLSI circuits for very attractive system applications, such as portable wireless communication systems.