Observation of Slow Oxide Traps at MOSFETs Having Metal/High-k Gate Dielectric Stack in Accumulation Mode

The random telegraph noise in a gate leakage current in an accumulation mode has been studied to characterize slow oxide traps at nMOSFET devices having a TiN/HfO
₂
/SiO
₂
gate stack. New equations for the trap's vertical location and energy level were derived by means of the relation between the trap's energy and Fermi levels in the accumulation mode. Through our analysis in both the accumulation and inversion modes, we found that the measurement in the accumulation mode is complementary to that in the inversion mode in order to assess the traps within a wide range of energy levels.