VLSI architectures for lattice structure based orthonormal discrete wavelet transforms

We present efficient single-rate architectures for the one-dimensional orthonormal discrete wavelet transform (DWT). In the paper we make two contributions. First, we show that architectures that are based on the quadrature mirror filter (QMF) lattice structure require approximately half the number of multipliers and adders than corresponding direct-form structures. Second, we present techniques for mapping the 1-D orthonormal DWT to folded and digit-serial architectures which are based on the QMF lattice structure. For folded architectures, we discuss two techniques for mapping the QMF lattice structure to hardware. For digit-serial architectures, we show that any two-channel subband system can be implemented using digit-serial processing techniques by utilizing the polyphase decomposition. Using this result, we describe an orthonormal DWT architecture which uses the QMF lattice structure and digit-serial processing techniques. The proposed folded and digit-serial QMF lattice structures are attractive choices for implementations of the orthonormal DWT which require low area and low power dissipation.