LISA: Maximizing RO PUF's secret extraction

The silicon physical unclonable functions (PUF) measure uncontrollable variations of the integrated circuit (IC) fabrication process to facilitate IC authentication. One of the most reliable silicon PUF structures is the ring oscillator (RO) PUF; however, the lack of efficient secret extraction schemes diminishes its practicality. In this work, we propose a longest increasing subsequence-based grouping algorithm (LISA) to enhance the hardware utilization. To analyze the performance of LISA, we introduce a hybrid architecture and formulate its cost and delay metrics; by solving the introduced hybrid coefficient, RO PUF designers can quickly determine the optimal hardware configuration. Finally, our claims are validated by a proof-of-the-concept FPGA-based implementation.