Pt vias for high temperature MEMS interconnects

A process sequence has been developed and characterized to fabricate interconnect structures in MEMS devices capable of withstanding thermal cycles up to at least 700°C. Via test structures with 3-7 μm diameter and 5-10 μm depth were etched in thermally oxidized silicon wafers and filled with platinum (Pt). Key enabling process steps were Pt electroplating and Pt CMP as reported herein. Target applications include piezoelectric MEMS or other devices requiring high temperature processing.