Analysis of a Chaos-Based Non-Coherent Delay Lock Tracking Loop

In this paper, exact analytical expressions for a chaos-based non-coherent tracking loop are derived in presence of noise. The control law governing the timing estimation of the tracking loop are then derived based on the correlation properties of Chebychev polynomials. The loop error curves are simulated for various timing differences between early and late gates and the results are compared to the experimental results obtained from a digital signal processor with very close agreement. The tracking loop performance in terms of instantaneous and cumulative timing estimation is examined with and without noise by simulation and hardware implementation. It is found that robust non-coherent tracking of the chaotic chips is possible using signal processing algorithms if discrete mapped chaotic signals are used. It is also found that the theoretical concept is fully implementable in hardware showing close agreement with the theoretical analysis.