Zero-cost MTP high density NVM modules in a CMOS process flow

A zero-cost embedded high density MTP NVM with extensive statistical verification is presented. The family of compact single Poly modules ranging from 64 bit to 64 kbit is based on the Y-Flash concept, employing original array architectures and implemented in standard and power management (PM) 0.18 μm CMOS process flows. No special HV devices or additional masks are employed. Excellent reliability performance allowing more than 10 k program/erase cycles and 10 year data retention at 150°C is demonstrated.