High performance Flash memory for 65 nm embedded automotive application

In this paper the results obtained for a new process flow that integrates a high performance flash cell for automotive application with a state of the art 65 nm CMOS have been presented. Despite the several specific process steps introduced for the first time on embedded technologies, the MOS performances have not been impacted by the integration of the flash cell and the related HV MOS and the results obtained on a 4 Mbit flash array are very promising.