Modelling of sigma-delta converters in SystemC for the electromechanical systems control

In this paper, we expose the design and implementation stages of sigma-delta converters based on over-sampling techniques by using the specification tool SystemC. We used SystemC as simulation tool of hardware systems to test sigma-delta converters based on fir (finite impulse response) decimation filter. The converters validation is realized on a regulation system for a DC-motor. The interest of these converters is the use of an important sampling rate compared to the variables system dynamic of the modeled system which induces: (1) Increase in the resolution of the acquired or restored data. (2) Attenuation of the quantification noises. (3) Simplification of anti-aliasing filters implementation. In the context of SOC design's methodologies improvement, we also describe the specification of a numerical control system at various abstraction levels. In particular, this specification is carried out for the levels of abstraction TLM (Transaction Level Model) and RTL (Register Transfer Level). The specification approach in the regulator's design can be extended to other electromechanical processes. We carried out the specification of the regulator by using SystemC since this tool allows the specification of numerical systems on TLM abstraction level, in addition to the material specification on RTL abstraction level.