A Custom-Design Data Logger Core for Physiological Signal Recording

Large data volumes are generated in physiological signal loggers so that the available memory becomes a limiting factor, particularly in small-size wearable applications. This paper demonstrates the practicality of using a programmable logic device as controller for MultiMediaCard memory for implementing a data logger, which can ultimately be realized as a fully integrated circuit. A minimum configuration in terms of complexity, cost, and size is sought using a minimal subset of the serial peripheral interface protocol and minimum overhead. The data bus frequency is linked to the converter clock, which ensures continuous data streaming with little implementation effort. The hardware realization of the controller in a 0.18-μm CMOS process occupies 0.014 mm
²
. The measured results confirm the performance of the logger using the electrocardiogram as a representative signal.