A fast implementation of modular inversion over GF (2m) based on FPGA

A fast algorithm for modular inversion over GF(2m) using Fermat's Little Theorem is presented. A parallel modular multiplication algorithm and a cascade modular square block to reduce the times of modular exponentiation are given. Synthesis and implementation are realized in a Xilinx device of XC5VLX110T. By timing simulation, the clock frequency can achieve 50MHz. It is required to carry out one modular inversion operation in 0.5μs with 25 clock periods.