Vast-fast low-triggering LTdSCR ESD protection structure for RF ICs in CMOS

This paper reports design of a novel low-parasitic ultra-low-triggering voltage dual-directional LTdSCR ESD protection structure in foundry CMOS. It features programmable low triggering voltage of 4.7∼6V, low discharging resistance of ∼0.77Ω, low leakage of ∼0.1nA, extremely low parasitic capacitance of ∼10fF and ultra fast response of ∼100ps. it achieves ESD protection of ≫7.8kV HBM and ∼500V CDM for a 90µm device. Measurement matches simulation very well. This low-parasitic low-triggering ESD protection structure is suitable for high data rate and low-voltage RF ICs in CMOS.