VLSI-Compatible Stress-Annealing in Doped Silicon Films

We present Rapid Thermal Annealing (RTA) as a VLSI-compatible method for the reduction of mechanical stress in doped Silicon films. Film stress is evaluated by measuring the difference in curvature of unstructured wafers before and after Si film removal. Results are presented for Boron and Arsenic doped films deposited as amorphous and polycristalline layers respectively. Thermal budgets necessary to achieve low stress Silicon films could be reduced by a factor of 100 compared to conventional furnace processing.