The Role of TCAD in Parasitic Analysis of ICs

Over the past two decades the scaling of IC technologies has reduced device dimensions by more than 20-fold. In the process of this scaling many reliability and parasitic effects have come to dominate the technology design process. Certainly MOS gate reliability and substrate currents (both due to impact ionization and junction leakage) are of major concern. This paper discusses the parasitic effects that result from multiple device interactions. Namely, as device dimensions have scaled, the number of possible multi-device interactions have increased. Examples are given concerning: latch-up, metastability, substrate noise, ESD and interconnect modeling.