An 8tb/s 1pj/b 0.8mm2/tb/s qdr inductive-coupling interface between 65nm cmos gpu and 0.1μm dram

An 8 Tb/s 1 pJ/b 0.8 mm
²
/Tb/s inductive-coupling interface between 65 nm CMOS GPU and 0.1 ¿m DRAM is developed. BER <10
^-16
operation is examined in 1024-bit parallel links. Compared to the latest wired 40 nm DRAM interface, the bandwidth is increased 32×, and the energy consumption and layout area are reduced by 8× and 22×, respectively.