An implementation of efficient SVC (scalable video coding) codec

In this paper, we propose an embedded scalable video codec (SVC) codec to use in intelligent image system. For efficient SVC VLSI design, we use a shared memory method and variable pipelined architecture. Many SVC codec systems are based on large memory and high frequency clock due to its characteristics of input images. To overcome these problems and use in real-time applications, we optimize memory control scheme and pipeline control method, which make it approximates a computation time by the use of past frame calculation time.