Progress in scaling-up silicon heterojunction solar cells: 16% efficiency obtained on 125 PS monocrystalline silicon

In this work, we have studied the scalability of our fabrication process for heterojunction solar cells up to 148.5 cm
²
total area. Double heterojunction devices were fabricated on both n- and p-type textured substrates using only doped (n) and (p) a-Si:H layers. ITO was used as anti-reflective coating and evaporated Aluminum as the metallic back contact. Finally, an Ag grid was screen-printed at the front side. Efficiencies higher than 16% have been obtained in both cases demonstrating the homogeneity and robustness of our fabrication process for larger substrates. Nevertheless, there is still room for improvement especially in terms of passivation, the V
_oc
values are still low (<640 mV), though it is a promising result considering that no intrinsic layer has been used.