Structurally synthesized multiple input BDDs for simulation of digital circuits

Binary decision diagrams (BDD) have become the state-of-the-art data structure in VLSI CAD for representation and manipulation of Boolean Functions. For verification, fault simulation and test generation purposes structurally synthesized BDDs (SSBDD) have proved to be better suited than traditional BDDs which represent only the function but not the structure of the circuit. In this paper we present an improvement of the SSBDD model in a form of SSBDDs with multiple inputs (SSMIBDD) which allows a significant reduction of the model complexity in the number of nodes which directly leads to decrease of the memory requirements and to increase of the speed of simulation.