Using reconfigurable hardware devices in WSNs for accelerating and reducing the power consumption of header processing tasks

In this paper, a pioneering platform is introduced, which utilizes all the advantages of CPLDs in order to enhance the processing power of the sensor nodes and, more importantly, significantly reduce the overall energy consumption in heavy demanding tasks such as routing and header processing. This new platform, accelerates the cost estimation algorithm of the XMesh routing protocol by 606 times. At the same time, and more importantly, there is a reduction in the measured energy consumption by 97%. Moreover, the proposed system can accelerate by three orders of magnitude the header checksum calculation scheme, while it consumes 96.33% less energy than the corresponding standard software implementations. Since this is the first time ever that such a hardware-based scheme is used in a WSN environment, we strongly believe that this paper can be a first reference for a new design paradigm for WSN nodes which will include CPLDs for the actual data/network processing.