Rapid prototyping of a DVB-SH turbo decoder using high-level-synthesis

In this paper, we present a prototyping exercise, mapping a turbo decoder high-level description directly to FPGA for fast simulation of a software radio. The turbo decoder algorithm is described in C programming language and the mapping has been done directly using the high level synthesis tool CoDeveloper. The manual transformations made on the code to facilitate ef!cient compilation and to achieve a tools compliant overall structure are described. The mapping exercise consists of several steps with changes resulting in improvements in performance and resource usage. The results in terms of effort of mapping and the achieved size and throughput are discussed.