Delayed-logic and finite-state machines

This paper concerns switching networks which consist of n identical combinational logic cells interconnected from left to right by alpha communication channels into linear arrays. The synchronous cells in these networks have unit switching delays separating their receipts of external x and left-neighbor alpha inputs from their corresponding productions of external z and right-neighbor alpha outputs. Three basic types of alpha transient behavior are discussed for such networks. In the first type, all transients extend to no more than a bounded number of cells to the right of each x change; in the second, all transients propagate all the way to the right boundary of the network; and in the third, any transient may or may not propagate to the right boundary of the network depending upon the x sequence to the right of the x change in question. In all three cases, necessary and sufficient conditions are given on the type of alpha logic allowed. These conditions are expressed in terms of corresponding alpha state graph structure. The paper's main results hinge on certain properties of a new type of state subgraph, and on an indirect application of permutation groups to the state-pair transition problem. A section of examples proves that individual graphs can contain any mixture of the above three types of transient behavior.