Jitter model of Fraction-N Synthesizer influenced by ΣΔ quantization noise

Sigma-Delta Modulation is an essential factor for high performance Fraction-N Synthesizer and the jitter of the output signal is one of the most important parameter to characterize the performance of synthesizer. In this paper, we presents a calculation model for jitter, which includes the phase noise model of Fraction-N divider with Sigma-Delta Modulation noise transfer model of the loop and the model of getting jitter from the output phase noise VCO. With this model, we can easily get all kinds of jitter of the loop output signal exactly. So it provides important theoretic foundation for the design of fraction-N synthesize.