The effect of Cu contamination on device reliability in DRAM

Effects of copper (Cu) contamination on device reliability in DRAM have been investigated. With device size scaling, copper-related dielectric degradation becomes one of the most important concerns due to the scaled dielectric thicknesses. The Cu out-diffusion from the direct contact (DC) bottom to the adjacent gate was observed for the failed samples with high temperature storage (HTS) stressing. HTS tests were performed at various temperatures to extract the activation energy for HTS failure. The predicted lifetime for the samples with Cu contamination was found to be 12 years at normal operating condition without stressing bias. Even though the root cause of the Cu contamination was not clearly revealed, based on the diffusion distance of Cu in silicon (Si), we speculated that the Cu contamination can be caused by the Cu migration into Si from the backside of wafer when the contamination was involved with one of packaging processes.