IMD stack thermal resistance effects on SiCr Thin Film Resistor's current density performance

Silicon Chromium (SiCr) has been used for years in the form of Thin Film Resistors (TFR) due to their high resistance in thin film form, low TCR and the ability to carry relatively high current densities. Historically industry has placed the SiCr TFR on top of the silicon wafer or on top of a process stack comprised of 0.6 ¿m of Silicon Dioxide, SiO₂, plus the silicon wafer. The next generation processes could place up to 5 ¿m of SiO₂ between the TFR and the silicon wafer to allow for devices to be placed under the TFR and thus reduce die area. The resistor technology and layout remains the same however recent stress testing has shown lower lifetimes the higher the resistor is in the stack. The only impact of moving the resistor higher in the stack is the higher thermal resistance between the TFR and the silicon which acts as the main heat sink for the die. This paper will detail the dependence of the TFR lifetime to temperature and the effects on current density limits as the resistor moves higher in the IMD stack.