A 10-bit 12-MS/s successive approximation ADC with 1.2-pF input capacitance

This paper reports a successive-approximation analog-to-digital converter (ADC) with low input capacitance. The 10-bit prototype is fabricated in a 0.13-¿m CMOS process. Compared to conventional successive approximation ADCs, the proposed ADC reduces the input capacitance to 1.2 pF for 10-bit resolution. At 12 MS/s and 1.2-V supply, this ADC consumes 0.32 mW and achieves an SNDR of 50.89 dB, resulting in an FOM of 95 fJ/Conversion-step.