A precise SystemC-AMS model for Charge Pump Phase Lock Loop with multiphase outputs

SystemC-AMS as an extension of SystemC provides the essential capability to describe a mix-signal heterogeneous system, so that a virtual-prototype model can be generated to help analyze a whole mix-signal system and further guide the circuit design. This paper presents an example of Systemc-ams modeling for a 10 phase 500MHz Charge Pump Phase Lock Loop, including digital models like Phase/Frequency Detector and clock N-divider, and analog models like Charge Pump, Low Pass Filter and Voltage Controlled Oscillator. In order to prove the model's accuracy, the SPICE simulation result from the corresponding CMOS circuits based on the same structure of these models is used for comparison, and PLL Systemc-ams model is validated
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