Grid synchronization system for power converters

In this paper, is proposed a new three-phase synchronization algorithm having a fast dynamic response and robust performance under distortion and/or fault conditions. Details on the structure and the digital implementation are provided. In order to validate the effectiveness of the three-phase phase-locked loop (PLL) algorithm, simulations using PSCAD/EMTDC are presented, under conditions that are similar to the ones encountered in practical digital implementations as low sampling rate and fixed-point arithmetic. Experimental results using a fixed-point DSP are presented as well.