High Performance of Ge nMOSFETs Using $\hbox{SiO}_{2}$ Interfacial Layer and TiLaO Gate Dielectric

Using a SiO
₂
interfacial layer and a high-¿ gate TiLaO dielectric, the TaN/TiLaO/SiO
₂
on Ge/Si nMOSFETs in this study showed a small 1.1-nm capacitance equivalent thickness, a good high field mobility of 201 cm
²
/(V · s) at 0.5 MV/cm, and a very low off-state leakage current of 3.5 × 10
^-10
A/¿m. The self-aligned and gate-first metal-gate/high-¿ and Ge nMOSFETs were processed using standard ion implantation and 550°C RTA. The proposed devices are fully compatible with current VLSI fabrication methods.