Improvements in the flicker noise reduction technique for osillator designs

This paper presents a technique in oscillator design to reduce the flicker noise of an active device. The architecture presented consists of two feedback loops, an RF loop for the oscillator operation and a low pass loop for flicker noise reduction. Flicker noise is reduced by providing a feedback path for low frequencies. To verify the concept, simulations and measurements of a voltage control oscillator at 1.57 GHz implemented with GaAsFET are presented. Simulations and measurements verify the phase noise reduction. The measurements of the VCO with low frequency feedback has shown a phase noise performance of −134 dBc/Hz at an offset of 1MHz from the carrier frequency, whereas for the oscillator without the low frequency feedback this value was −127 dBc/Hz. The measured improvement of 7dB in phase noise performance supports the flicker noise reduction technique in oscillators.