Embedded capacitor-multiplier compensation for area-efficient low-power multistage amplifiers

An embedded capacitor-multiplier compensation (ECMC) scheme for area-efficient low-power multistage amplifiers is introduced in this paper. Without consuming extra quiescent current, the embedded capacitor multiplier allows the amplifier to drive very large capacitive loads effectively by using quite small on-chip compensation capacitors. Moreover, it provides a feedforward signal path to generate a left-half-plan (LHP) zero and therefore significantly improves the stability and settling behavior of the amplifier. Implemented in a commercial 0.35-mum CMOS process, a three-stage ECMC amplifier driving 1000-pF capacitive load achieves over 100 dB gain, 1.33-MHz unit-gain frequency (UGF), 80deg phase margin and 0.6-V/muS average slew rate, while only dissipating 40-muW under 1.5-V supply. The total compensation capacitance is just 1.45-pF.