A wide spreading range programmable spread spectrum clock generator using a ΣΔ fractional-N PLL

A programmable spread spectrum clock generator (PSSCG) using fractional-N phase-locked loop (PLL) is presented. Spreading is achieved by modulating the feedback divider using a triangular wave through a ΣΔ modulator. In order to allow wide spreading ratios a new technique is adopted to keep the triangular wave within the input range of the ΣΔ modulator. The clock frequency is programmable from 8–280 MHz with center and down spreading (0.5%, 1%, 2%, 4%). The RMS period jitter is 8.7 ps at 280 MHz. The electromagnetic interference (EMI) reduction is 18.1 dB at 4% center spreading. The proposed PSSCG is designed using a CMOS 0.18μm 6-metal technology and has an active area of 0.66 × 0.45 mm
²
.