Optimized Porous Si Microplate Technology for On-Chip Local RF Isolation | IEEE Journals & Magazine | IEEE Xplore

Optimized Porous Si Microplate Technology for On-Chip Local RF Isolation


Abstract:

In this paper, we present an optimized porous Si (PS) microplate technology for use as a local substrate for the on-chip integration of RF passives. The substrate used is...Show More

Abstract:

In this paper, we present an optimized porous Si (PS) microplate technology for use as a local substrate for the on-chip integration of RF passives. The substrate used is a heavily doped p-type Si wafer with a resistivity of 0.005 Omegamiddotcm, which shows similar RF response to the p/p+ epiwafers, commonly used by complementary metal-oxide-semiconductor industry. Broadband electrical characterization of the microplates in the frequency range from dc up to 20 GHz was performed by integrating on them coplanar waveguides and using them to characterize RF losses in the composite PS/Si substrate material. We show that the porous material has a complex permittivity epsiv = 3.05(1 + i0.029), which is much superior to that obtained by the authors for PS grown on a p-type substrate. The effect of the thickness of the PS membrane on the RF isolation was also examined.
Published in: IEEE Transactions on Electron Devices ( Volume: 56, Issue: 11, November 2009)
Page(s): 2733 - 2738
Date of Publication: 06 October 2009

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