Wafer post-processing for a reconfigurable wafer-scale circuit board

The WaferBoard
^trade
rapid prototyping platform for electronic systems is proposed as a tool to help meet today's tight delivery time, performance and reliability constraints. At the core of WaferBoard
^trade
is the WaferIC
^trade
, a wafer-scale reconfigurable CMOS circuit. At the surface of this complex circuit is a sea of identical contacts, any pair of which can be interconnected through a mesh grid network called WaferNet
^trade
. The user can simply deposit packaged integrated circuits on the smart active surface, and then a complex interconnect pattern between these ICs can be established in a matter of minutes. As is the case with development of any novel technology, design of the platform poses several technical challenges. Postprocessing tasks to be accomplished on the CMOS wafer are laid out hereafter. A .18mum CMOS TestChip fabricated to validate the WaferIC
^trade
concept on a 1/100
^th
scale is outlined. Furthermore, sample microfabrication results, such as TSV etching, are presented along with thermo-mechanical investigation outcomes.