A 400MS/s 10-bit current-steering D/A converter

This paper presents a 10-bit 400 MS/s CMOS current-steering digital-to-analog converter (DAC) for video applications. The proposed DAC adapts segmented architecture, composed of 6 MSBs unary and 4 LSBs binary-weighted cells. An improved current switching scheme is developed to compensate the systematic error further. The post-layout simulation results show that the converter achieves a spurious-free dynamic range (SFDR) up to 71.5 dB and a 1LSB settle time smaller than 500 ps at 400 MS/s. The full-scale output current is 20 mA with 3 V power supply for analog part, while the digital part of the chip operates at 1.8 V. The active area is 0.2 mm
²
in a standard 1P-6M 0.18 mum CMOS process.