A Register Allocation Algorithm Based on Predicate Analysis System

In order to allocate registers efficiently for predicated code, a new algorithm based on predicate analysis system is presented, which uses binary decision diagrams for constructing refined interference graph. The algorithm is implemented in the compiler of XXX-DSP/700 chip developed by our college. Experiment results show that the number of used registers is reduced 24.51% evenly, and the average speedup of code execution time reaches 1.31.