Performance Enhancements in Scaled Strained-SiGe pMOSFETs With $ \hbox{HfSiO}_{x}/\hbox{TiSiN}$ Gate Stacks

The short-channel performance of compressively strained Si
_0.77
Ge
_0.23
pMOSFETs with HfSiO
x
/TiSiN gate stacks has been characterized alongside that of unstrained-Si pMOSFETs. Strained-SiGe devices exhibit 80% mobility enhancement compared with Si control devices at an effective vertical field of 1 MV middotcm
^-1
. For the first time, the on-state drain-current enhancement of intrinsic strained-SiGe devices is shown to be approximately constant with scaling. Intrinsic strained-SiGe devices with 100-nm gate lengths exhibit 75% enhancement in maximum transconductance compared with Si control devices, using only ~20% Ge (~0.8% strain). The origin of the loss in performance enhancement commonly observed in strained-SiGe devices at short gate lengths is examined and found to be dominated by reduced boron diffusivity and increased parasitic series resistance in compressively strained SiGe devices compared with silicon control devices. The effective channel length was extracted from
I
-
V
measurements and was found to be 40% smaller in 100-nm silicon control devices than in SiGe devices having the same lithographic gate lengths, which is in good agreement with the metallurgical channel length predicted by TCAD process simulations. Self-heating due to the low thermal conductivity of SiGe is shown to have a negligible effect on the scaled-device performance. These findings demonstrate that the significant on-state performance gains of strained-SiGe pMOSFETs compared with bulk Si devices observed at long channel lengths are also obtainable in scaled devices if dopant diffusion, silicidation, and contact modules can be optimized for SiGe.