Device technology innovation for exascale computing

For the past 40 years, the scaling of CMOS device technology has enabled system performance to double every two years. However, emerging classes of applications for which network-speed processing and data-intensive modeling are integral components will demand a much faster rate of improvement, such as 2x/year in order to reach exaflop capabilities (100x–1000x over present systems) by the end of the next decade. These applications represent a significant growth opportunity and require continued innovation in silicon device scaling to increase intrinsic transistor performance/power and density. In addition, new system architectures will take advantage of 3D chip technology to enable a higher level of hybrid integration, new memory technology such as Phase Change Memory (PCM) will allow implementation of a new level of memory architecture, and silicon photonics on the processor will meet ultra-low power, low cost and high density communications needs. These and other innovations will lead to significant improvement in systems integration, performance, and power efficiency.