Silicon implementations of neural networks

Synthetic neural networks can be implemented in silicon as computer simulations, as digital or analog integrated circuits, or in a hybrid analog/digital form. The largest computational load in a neural system is incurred by the weighted summation T/sub ij/ where V/sub j/ is a neural state and T/sub ij/ the matrix of synaptic weights. This paper reviews representative progress in these areas, concentrating on analog implementations, with particular reference to the author's own work. Conclusions are drawn as to the problem areas for future work, and to the implications on neural algorithms and architecture of the constraints imposed by hardware.<
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